Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-04-08
1998-12-22
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438234, H01L 218238
Patent
active
058518630
ABSTRACT:
An n-type buried layer and an n-type epitaxial layer that becomes a collector layer of a pnp transistor are formed on a semiconductor substrate. A well and the collector layer are formed. Ions of an n-type impurity are implanted through a photoresist mask, to form an intrinsic base layer of the pnp transistor and a PT-VT diffusion layer with punchthrough stopper and threshold control functions of a pMOSFET. Ions of a p-type impurity are implanted through a photoresist mask at a shallow implantation depth than the previous step, to form an intrinsic base layer of an npn transistor and a channel dope layer of the pMOSFET. A buried channel is formed under the gate of the pMOSFET. Therefore pMOSFETs with good characteristics can be obtained. In this way, the present invention achieves bipolar transistors and MOSFETs with good characteristics, without having to increase the number of fabrication steps and the number of photoresist masks.
REFERENCES:
patent: 4480375 (1984-11-01), Cottrell et al.
Fujii Taizo
Fujinaga Sugao
Hirai Takehiro
Matsushita Electric - Industrial Co., Ltd.
Nguyen Tuan H.
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