Electronic digital logic circuitry – Significant integrated structure – layout – or layout...
Reexamination Certificate
2009-05-27
2010-10-05
Chang, Daniel D (Department: 2819)
Electronic digital logic circuitry
Significant integrated structure, layout, or layout...
C326S041000, C326S047000
Reexamination Certificate
active
07808280
ABSTRACT:
A semiconductor device includes multiple functional blocks, each having a predetermined function, and wiring regions on a substrate where a signal line is provided. The semiconductor device also includes multiple standard cells disposed in the wiring regions along the signal line, each of which operates with a substrate bias potential, and multiple contact cells disposed in the wiring region in parallel with the wiring direction of the signal line, each being associated with each of the multiple standard cells and providing the substrate bias potential to the associated standard cell.
REFERENCES:
patent: 7295036 (2007-11-01), Zaveri et al.
patent: 2006-173478 (2006-06-01), None
patent: 2008-270429 (2008-11-01), None
Chang Daniel D
Kabushiki Kaisha Toshiba
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
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