Semiconductor device

Details Semiconductor device Semiconductor device

2005-02-02

2009-10-06

Smith, Bradley K (Department: 2894)

Active solid-state devices (e.g., transistors, solid-state diode

With means to increase breakdown voltage threshold

Reverse-biased pn junction guard region

C257SE29012

Reexamination Certificate

active

07598587

ABSTRACT:
A semiconductor layer of n−type is formed on a semiconductor substrate of p−type. A first buried impurity region of n+type is formed at an interface between the semiconductor substrate and the semiconductor layer. A second buried impurity region of p+type is formed at an interface between the first buried impurity region and the semiconductor layer. Above the first and second buried impurity regions, a first impurity region of n type is formed in an upper surface of the semiconductor layer. Above the first and second buried impurity regions, a second impurity region of p type is also formed apart from the first impurity region in the upper surface of the semiconductor layer. When the second impurity region becomes higher in potential than the first impurity region, the second impurity region and the second buried impurity region are electrically isolated from each other by a depletion layer.

REFERENCES:
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patent: 6424014 (2002-07-01), Sasaki et al.
patent: 2003/0173624 (2003-09-01), Choi et al.
patent: 2004/0084744 (2004-05-01), Khemka et al.
patent: 2001-237437 (2001-08-01), None
patent: 2003-92414 (2003-03-01), None
A.W. Ludikhuize et al., “Improved Device Ruggedness by Floating Buffer Ring”, The 12thInternational Symposium on Power Semiconductor Devices & Ics, 2000, pp. 153-156.
Vishnu Khemka, “A Floating Resurf (Fresurf) LD-MOSFET Device Concept”, IEEE Electron Device Letters, vol. 24, No. 10, Oct. 2003, pp. 664-666.

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