Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2007-10-19
2009-08-11
Nguyen, Tuan T (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S189011, C365S230030
Reexamination Certificate
active
07573753
ABSTRACT:
A semiconductor device capable of accessing to the memory with a high speed, and including a memory with a large capacity. The semiconductor device includes a plurality of memory banks (Bank)1to3where the write cycle time is twice as long as the read cycle and each provided with the separate write and read ports, and two cache data banks CD0and CD1, in which, for example, in the case that an external write instruction with continuous cycles is issued in cycle #2, the data of Bank2stored in CD1, Row2cannot be written back since Bank2is busy with the cycle #1, the data of Bank0stored in CD0, Row2can be written back instead.
REFERENCES:
patent: 5617347 (1997-04-01), Lauritzen
patent: 5825682 (1998-10-01), Fukui
patent: 7203794 (2007-04-01), Ji et al.
patent: 7219185 (2007-05-01), Luicki
patent: 7236421 (2007-06-01), Eldridge et al.
patent: 2001/0040827 (2001-11-01), Dosaka et al.
patent: 2004/0225829 (2004-11-01), Akiyama et al.
Atwood Bryan
Watanabe Takao
Le Toan
Miles & Stockbridge P.C.
Nguyen Tuan T
Renesas Technology Corp.
LandOfFree
Semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4084446