Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1988-03-17
1989-03-14
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365177, 307446, 307570, G11C 700
Patent
active
048130206
ABSTRACT:
A composite circuit including a MOS transistor and a bipolar transistor to be driven by the MOS transistors and forming an output stage, a logical inverter circuit connected to an output terminal of the composite circuit to invert the level of the output signal, and a MOS transistor having a source and a drain thereof parallelly connected across a collector and an emitter of the bipolar transistor are provided. When the bipolar transistor conducts with a voltage drop associated with a base-emitter voltage, the parallelly connected MOS transistor renders the bipolar transistor completely conductive so that a level-shiftless output signal is produced.
REFERENCES:
patent: 4612466 (1986-09-01), Stewart
H. C. Lin et al., "Complementary MOS-Bipolar Transistor Structure", IEEE Transactions on Electron Devices, vol. ED-16, No. 11, Nov. 1969, pp. 945-951.
Iwamura Masahiro
Masuda Ikuro
Hitachi , Ltd.
Popek Joseph A.
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