Semiconductor device

Details Semiconductor device Semiconductor device

2006-12-05

2006-12-05

LaMarre, Guy (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S733000, C365S201000

Reexamination Certificate

active

07146547

ABSTRACT:
In a testing method for a semiconductor memory using a memory BIST process, when it is difficult to carry out a comparing process in one cycle, a pipelining process is used for an expected value comparison, and in this case, in order to cut the number of flip-flops and to reduce an occupied area, at the time of a memory BIST process, a pipeline-use flip-flop and a scan-observing-use flip-flop and/or a scan-control-use flip-flop are used.

REFERENCES:
patent: 5729553 (1998-03-01), Motohara
patent: 5960008 (1999-09-01), Osawa et al.
patent: 5961653 (1999-10-01), Kalter et al.
patent: 6829728 (2004-12-01), Cheng et al.

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