Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2002-05-22
2003-02-25
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S706000, C257S787000, C257S747000
Reexamination Certificate
active
06525418
ABSTRACT:
BACKGROUND OF INVENTION
This invention relates to a circuit comprised of an insulated metal substrate on which a semiconductor bare chip is mounted and more particularly to an improvement in thermal dissipation from the bare chip.
Circuits embodying semiconductor devices are used as control circuits for various types of electronic equipment and devices and in vehicle and industrial equipment and devices. The circuit takes the form of a bare chip is mounted on the electrodes or circuit pattern formed on an insulated substrate. This improves performance by reducing resistance by shortening the wire length. It also permits higher efficiency in the manufacturing process and higher mounting density to reduce size. Generally the bare chip is soldered to the electrodes or circuit pattern on the substrate and then sealed with resin.
In such semiconductor circuits, thermal stress is generated by the difference in thermal expansion and/or shrinkage between the semiconductor chip and the substrate. This is generated by the heat developed in the semiconductor chip itself and temperature cycling of the ambient environment. To reduce such thermal stress, the semiconductor chip is soldered to the substrate via a heat sink formed from a highly conductive plate member, such as copper. However, use of such a heat sinks increase the number of parts, cause the structure to become complicated, reduce the density of chip mounting and increase the difficulty and expense in assembly process.
A circuit including a semiconductor device intended to reduce thermal stress without such a heat sink is disclosed in Japanese Publication 07-249714. The semiconductor device described in that publication is a complex circuit embodying a semiconductor device. The circuit comprises an aluminum substrate on which a conductive pattern is formed via an insulating layer. A semiconductor chip is directly soldered on the conductive pattern, and then sealed with resin having a coefficient of thermal expansion smaller than that of the aluminum substrate.
However, the resin for sealing the semiconductor chip has a lower coefficient of thermal expansion that of the aluminum substrate. Therefore, it is not always possible to obtain sufficient reduction in thermal stress for all types of semiconductor chips and of materials of conductive patterns.
It is therefore a principle object of this invention to provide a circuit embodying a semiconductor device which reduces the thermal stress in the semiconductor chip and without a heat sink.
SUMMARY OF INVENTION
This invention is adapted to be embodied in a circuit comprising a metal substrate, an insulating layer on the substrate and a conductive pattern formed on the insulating layer. A semiconductor bare chip is mounted directly onto the conductive pattern without a heat sink. A sealing body is formed over the semiconductor bare chip. The sealing body is formed from a material having a thermal expansion coefficient approximately equal to that of the conductive pattern.
REFERENCES:
patent: 4604642 (1986-08-01), Sakurai
patent: 5721455 (1998-02-01), Takashita
patent: 5736786 (1998-04-01), Sankaran et al.
patent: 5771157 (1998-06-01), Zak
patent: 5982631 (1999-11-01), Bowles et al.
patent: 6242801 (2001-06-01), Sano
patent: 7-249714 (1995-09-01), None
Beutler Ernest A.
Clark Sheila V.
Kabushiki Kaisha MORIC
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