Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-09-12
2006-09-12
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S244000
Reexamination Certificate
active
07105402
ABSTRACT:
The invention includes a DRAM array having a structure therein which includes a first material separated from a second material by an intervening insulative material. The first material is doped to at least 1×1017atoms/cm3with n-type and p-type dopant. The invention also includes a semiconductor construction in which a doped material is over a segment of a substrate. The doped material has a first type majority dopant therein, and is electrically connected with an electrical ground. A pair of conductively-doped diffusion regions are adjacent the segment, and spaced from one another by at least a portion of the segment. The conductively-doped diffusion regions have a second type majority dopant therein. The invention also encompasses methods of forming semiconductor constructions.
REFERENCES:
patent: 4570331 (1986-02-01), Eaton et al.
patent: 4686000 (1987-08-01), Heath
patent: 4937756 (1990-06-01), Hsu et al.
patent: 5164806 (1992-11-01), Nagatomo et al.
patent: 5369295 (1994-11-01), Vinal
patent: 5397909 (1995-03-01), Moslehi
patent: 5635744 (1997-06-01), Hidaka et al.
patent: 5654573 (1997-08-01), Oashi et al.
patent: 5672526 (1997-09-01), Kawamura
patent: 5814875 (1998-09-01), Kumazaki
patent: 5866934 (1999-02-01), Kadosh et al.
patent: 5893728 (1999-04-01), Hidaka
patent: 5923975 (1999-07-01), Rolandi
patent: 5930614 (1999-07-01), Eimori et al.
patent: 6060364 (2000-05-01), Maszara et al.
patent: 6194276 (2001-02-01), Chan et al.
patent: 6204536 (2001-03-01), Maeda et al.
patent: 6277720 (2001-08-01), Doshi et al.
patent: 6359319 (2002-03-01), Noda
patent: 6362034 (2002-03-01), Sandford et al.
patent: 6380598 (2002-04-01), Chan
patent: 6429079 (2002-08-01), Maeda et al.
patent: 6429491 (2002-08-01), Schnaitter
patent: 6436747 (2002-08-01), Segawa et al.
patent: 6451704 (2002-09-01), Pradeep et al.
patent: 6468865 (2002-10-01), Yang et al.
patent: 6479330 (2002-11-01), Iwamatsu et al.
patent: 6492694 (2002-12-01), Noble et al.
patent: 6512269 (2003-01-01), Bryant et al.
patent: 6515899 (2003-02-01), Tu et al.
patent: 6521487 (2003-02-01), Chen et al.
patent: 6552401 (2003-04-01), Dennison
patent: 6586803 (2003-07-01), Hidaka et al.
patent: 6607979 (2003-08-01), Kamiyama
patent: 2002/0164846 (2002-11-01), Lin et al.
patent: 2003/0071310 (2003-04-01), Salling et al.
patent: 0718881 (1996-06-01), None
U.S. Appl. No. 09/721,697, filed Nov. 27, 2000, Dennison.
“Session 18: Integrated Circuits and Manufacturing—DRAM and Embedded DRAM Technology”, 2001 IEDM Technical Program, 2001 IEEE International Electron Devices Meeting, Dec. 4, 2001, reprinted Nov. 15, 2001 from http://www.his.com/˜iedm/techprogram/sessions/s18.html., pp. 1-2.
“Session 18: Intregrated Circuits and Manufacturing -DRAM and Embedded DRAM Technology”, 2001 IEDM.
Technical Program 2001 IEEE International Electron Devices Meeting, Dec. 4, 2001, reprinted Nov. 15, 2001 from http://www.his.com/-iedm/techprogram/sessions/s18.html., pp. 1-2.
McQueen Mark
Mouli Chandra
Tran Luan C.
Micro)n Technology, Inc.
Pham Long
Trinh (Vikki) Hoa B.
Wells St. John P.S.
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