Semiconductor CMOS devices and methods with NMOS high-k...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S275000, C438S287000, C257SE21639

Reexamination Certificate

active

11118237

ABSTRACT:
The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS regions. A first oxide layer is formed in core and I/O regions of a semiconductor device (506). The first oxide layer is removed (508) from the core region of the device. A high-k dielectric layer is formed (510) over the core and I/O regions. Then, the high-k dielectric layer is removed (512) from PMOS regions of the core and I/O regions. A second oxide layer is formed (516) within NMOS regions of the core and I/O regions and a nitridation process is performed (518) that nitrides the second oxide layer and the high-k dielectric layer.

REFERENCES:
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patent: 6528858 (2003-03-01), Yu et al.
patent: 6538278 (2003-03-01), Chau
patent: 6586293 (2003-07-01), Hasegawa
patent: 6979623 (2005-12-01), Rotondaro et al.
patent: 7026232 (2006-04-01), Koontz et al.
patent: 2005/0098839 (2005-05-01), Lee et al.
U.S. Appl. No. 11/118,842, filed Apr. 29, 2005.
U.S. Appl. No. 11/118,843, filed Apr. 29, 2005.

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