Semiconductor chip structure, method of manufacturing the...

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – Groove

Reexamination Certificate

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C257S773000

Reexamination Certificate

active

07825495

ABSTRACT:
A semiconductor chip structure may include a semiconductor chip, a first insulation layer and a redistribution layer. The first insulation layer may be formed on the semiconductor chip. The first insulation layer may have at least one first groove formed at an upper surface portion of the first insulation layer. Further, the at least one first groove may have an upper width and a lower width greater than the upper width. The redistribution layer may be partially formed on the first insulation layer. The redistribution layer may have at least one first protrusion formed on a lower surface portion of the redistribution layer. The first protrusion may have an upper width and a lower width less than the upper width. The first protrusion may be inserted into the at least one first groove.

REFERENCES:
patent: 5972193 (1999-10-01), Chou et al.
patent: 6316288 (2001-11-01), Hashimoto
patent: 2004/0192024 (2004-09-01), Ito
patent: 2005/0000729 (2005-01-01), Iljima et al.
patent: 2006/0220247 (2006-10-01), Hanaoka
patent: 2003-007701 (2003-01-01), None
patent: 2004-247535 (2004-09-01), None

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