Semiconductor chip soldering land pattern

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond

Reexamination Certificate

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C257S786000, C257S787000

Reexamination Certificate

active

06841887

ABSTRACT:
A semiconductor chip mounted on a substrate having a soldering land pattern for containing a molten solder interposed between said conductive surface and a facing surface of the semiconductor chip. The soldering land pattern comprises corners spaced respectively from the four corners of the semiconductor chip bottom surface and escapes formed between the corners sufficiently outside of the respective sides of the semiconductor chip bottom surface to accept liquid solder displaced from the area between the conductive surface and the facing surface of the semiconductor chip upon placing the semiconductor chip within the soldering land pattern to improve conductivity and simplify the construction. The device is also shown in a motor control.

REFERENCES:
patent: 5668406 (1997-09-01), Egawa
patent: 5708567 (1998-01-01), Shim et al.
patent: 5889324 (1999-03-01), Suzuki
patent: 6525418 (2003-02-01), Araki

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