Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2007-12-11
2007-12-11
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S107000, C438S109000, C438S110000, C438S112000, C438S113000, C438S118000, C257SE21503, C257SE21505
Reexamination Certificate
active
10976601
ABSTRACT:
Individual pieces of film adhesive (42) are placed on a support surface (46). Diced semiconductor chips (24) are individually placed on the individual pieces of the film adhesive thereby securing the diced semiconductor chips to the support surface to create first chip subassemblies (52). The diced semiconductor chip and support surface of each of a plurality of the first chip subassemblies are electrically connected, such as by wires (54), to create second chip subassemblies ((56). At least a portion of at least some of the second chip subassemblies are encapsulated, such as with molding compound (58), to create semiconductor chip packages (60).
REFERENCES:
patent: 5140404 (1992-08-01), Fogal et al.
patent: 5218229 (1993-06-01), Farnworth
patent: 5323060 (1994-06-01), Fogal et al.
patent: 5372883 (1994-12-01), Shores
patent: 5776799 (1998-07-01), Song et al.
patent: 5918113 (1999-06-01), Higashi et al.
patent: 5945733 (1999-08-01), Corbett et al.
patent: 6265763 (2001-07-01), Jao et al.
patent: 6333562 (2001-12-01), Lin
patent: 6340846 (2002-01-01), LoBianco et al.
patent: 6351028 (2002-02-01), Akram
patent: 6388313 (2002-05-01), Lee et al.
patent: 6436732 (2002-08-01), Ahmad
patent: 6441496 (2002-08-01), Chen et al.
patent: 6472758 (2002-10-01), Glenn et al.
patent: 6503821 (2003-01-01), Farquhar et al.
patent: 6569709 (2003-05-01), Derderian
patent: 6593662 (2003-07-01), Pu et al.
patent: 6620651 (2003-09-01), He et al.
patent: 6650009 (2003-11-01), Her et al.
patent: 6885093 (2005-04-01), Lo et al.
patent: 7115484 (2006-10-01), Feng
patent: 2002/0064905 (2002-05-01), Park et al.
patent: 2003/0030132 (2003-02-01), Lee et al.
patent: 2003/0038357 (2003-02-01), Derderian
patent: 2003/0038374 (2003-02-01), Shim et al.
patent: 2003/0178710 (2003-09-01), Kang et al.
patent: 2004/0026768 (2004-02-01), Taar et al.
patent: 2004/0087054 (2004-05-01), Abe
patent: 2004/0097054 (2004-05-01), Abe
patent: 2005/0090050 (2005-04-01), Shim et al.
patent: 2005/0208700 (2005-09-01), Kwon et al.
Lintec Semiconductor-Related Products Web Site, “Adwill Semiconductor-Related Products”, 1 page, http://www.lintec.co.jp/e-dept/english/adwill/adwill.html, downloaded Mar. 1, 2004.
Lintec Semiconductor-Related Products Web Site, “Products for Dicing Process”, 2 pages, http://www.lintec.co.jp/e-dept/english/adwill/diceproces.html, downloaded Mar. 1, 2004.
Lintec Semiconductor-Related Products Web Site, “Products for back-grinding process”, 1 page, http://www.lintec.co.jp/e-dept/english/adwill/bgproces.html, Downloaded Mar. 1, 2004.
Jeong Jin-Wook
Ju Jong Wook
Kwon Hyeog Chan
Lee Hee Bong
Lee Sang Ho
Chippac Inc.
Lebentritt Michael
Lee Kyoung
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