Semiconductor chip having notches formed in peripheral edges the

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds

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257784, 257666, 257668, H01L 2940

Patent

active

053410270

ABSTRACT:
A semiconductor device which includes a semiconductor integrated circuit chip provided with a plurality of chip bonding pads contiguous with the peripheral edge of the chip, and a plurality of leads directly bonded to respective ones of the chip bonding pads. The bonding pads are preferably formed within respective notches disposed in a marginal edge portion of the chip, with each of the notches having an open end formed in the peripheral edge of the chip. By locating the chip bonding pads contiguous with the peripheral edge of the chip, rather than a prescribed distance away from the peripheral edge of the chip, the bonding pads are directly accessible from the edge of the chip, thereby enabling the leads to be directly bonded to the bonding pads, and thus eliminating the need for bonding bumps or balls.

REFERENCES:
patent: 4622574 (1986-11-01), Garcia
patent: 4733289 (1988-03-01), Tsurumaru
patent: 4862249 (1989-08-01), Carlson
patent: 5136367 (1992-08-01), Chiu
patent: 5266833 (1993-11-01), Capps

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