Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate
2006-11-02
2009-08-18
Williams, Alexander O (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
C257SE23020, C257SE23039, C257SE23052, C257SE23178, C257SE23146, C257SE25012, C257SE25013, C257S301000, C257S302000, C257S754000, C257S315000, C257S041000, C257S760000, C257S666000, C257S780000, C257S723000, C257S728000, C257S724000, C257S211000, C257S203000, C257S208000, C257S725000
Reexamination Certificate
active
07576440
ABSTRACT:
A semiconductor chip comprises a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is formed on the semiconductor substrate. A pad-rearrangement pattern is electrically connected to the bond pad-wiring pattern. The pad-rearrangement pattern includes a bond pad disposed over at least a part of the cell region. The bond pad-wiring pattern is formed substantially in a center region of the semiconductor substrate. Thus, with the embodiments of the present invention, the overall chip size can thereby be substantially reduced and an MCP can be fabricated without the problems mentioned above.
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Choi Il-Heung
Kim Jeong-Jin
Lee Chung-Woo
Sohn Hae-Jeong
Song Young-Hee
Harness & Dickey & Pierce P.L.C.
Samsung Electronics Co,. Ltd.
Williams Alexander O
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