Semiconductor chip having bond pads

Details Semiconductor chip having bond pads Semiconductor chip having bond pads

2006-12-27

2009-06-16

Williams, Alexander O (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Configuration or pattern of bonds

C257SE23020, C257SE23052, C257SE23146, C257SE25013, C257S301000, C257S302000, C257S754000, C257S760000, C257SE23039, C257S315000, C257S686000, C257S723000, C257S784000, C257S728000, C257S777000, C257S211000, C257S208000

Reexamination Certificate

active

07547977

ABSTRACT:
In one embodiment, a semiconductor chip has one or more peripheral bond pads. The semiconductor chip comprises a semiconductor substrate having a cell region and a peripheral circuit region adjacent to each other; a bond pad-wiring pattern formed on at least a part of the peripheral region of the semiconductor substrate; a passivation layer formed on the bond pad-wiring pattern and exposed portions of the semiconductor substrate; a pad-rearrangement pattern disposed over the passivation layer and electrically connected to the bond pad-wiring pattern; and an insulating layer formed over the pad-rearrangement pattern. The insulating layer has an opening therein that exposes a portion of the pad-rearrangement pattern to define a bond pad. The bond pad is disposed over at least a part of the cell region.

REFERENCES:
patent: 4723197 (1988-02-01), Takiar et al.
patent: 4984050 (1991-01-01), Kobayashi
patent: 5365091 (1994-11-01), Yamagishi
patent: 5444012 (1995-08-01), Yoshizumi et al.
patent: 5502289 (1996-03-01), Takiar et al.
patent: 5677576 (1997-10-01), Akagawa
patent: 5723822 (1998-03-01), Lien
patent: 5751065 (1998-05-01), Chittipeddi et al.
patent: 5757078 (1998-05-01), Matsuda et al.
patent: 5834844 (1998-11-01), Akagawa et al.
patent: 5844304 (1998-12-01), Kata et al.
patent: 5886415 (1999-03-01), Akagawa
patent: 5960308 (1999-09-01), Akagawa et al.
patent: 5969424 (1999-10-01), Matsuki et al.
patent: 6008543 (1999-12-01), Iwabuchi
patent: 6103552 (2000-08-01), Lin
patent: 6111317 (2000-08-01), Okada et al.
patent: 6175149 (2001-01-01), Akram
patent: 6228687 (2001-05-01), Akram et al.
patent: 6239366 (2001-05-01), Hsuan et al.
patent: 6383916 (2002-05-01), Lin
patent: 6410414 (2002-06-01), Lee
patent: 6469370 (2002-10-01), Kawahara et al.
patent: 6489676 (2002-12-01), Taniguchi et al.
patent: 6498396 (2002-12-01), Arimoto
patent: 6503776 (2003-01-01), Pai et al.
patent: 6605528 (2003-08-01), Lin et al.
patent: 6657310 (2003-12-01), Lin
patent: 2002/0126459 (2002-09-01), Albert et al.
patent: 2002/0140077 (2002-10-01), King et al.
patent: 2004/0036182 (2004-02-01), Corisis et al.
patent: 2005/0230783 (2005-10-01), Lin
patent: 2006/0033216 (2006-02-01), Pflughaupt et al.
patent: 2007/0057383 (2007-03-01), Song et al.
patent: 19610302 (1996-10-01), None
patent: 0221496 (1987-05-01), None
patent: 1094517 (2001-04-01), None
patent: 59-181041 (1984-10-01), None
patent: 01-093136 (1989-04-01), None
patent: 04-324958 (1992-11-01), None
patent: 6-275794 (1994-09-01), None
patent: 06-275794 (1994-09-01), None
patent: 08-340002 (1996-12-01), None
patent: 09-107048 (1997-04-01), None
patent: 11-040624 (1999-02-01), None
patent: 11-111896 (1999-04-01), None
patent: 11-204576 (1999-07-01), None
patent: 11-354563 (1999-12-01), None
patent: 2000-031191 (2000-01-01), None
patent: 2000-058743 (2000-02-01), None
patent: 2000-183090 (2000-06-01), None
patent: 2000-294519 (2000-10-01), None
patent: 2001-156172 (2001-06-01), None
English language abstract for Japanese Publication No. 06-275794.
English language abstract for Japan Patent Publication No. 08-340002.
English language abstract for Japanese Patent Publication No. 09-107048.
English language abstract for Japanese Patent Publication No. 11-040624.
English language abstract for Japanese Patent Publication No. 11-111896.
English language abstract for Japanese Patent Publication No. 11-204576.
English language abstract for Japanese Patent Publication No. 2000-031191.
English language abstract for Japanese Patent Publication No. 2000-058743.
English language abstract for Japanese Patent Publication No. 2000-183090.
English language abstract for Japanese Patent Publication No. 2000-294519.
Yasunaga, et al. Chip Scale Package: “A Light Dressed LSI Chip” IEEE transactions on component, packaging and Manufacturing technology part A. vol. 18, No. 3, Sep. 1995, pp. 451-457.

Affiliated with

Also associated with

Rating

Semiconductor chip having bond pads does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor chip having bond pads, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor chip having bond pads will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4119221