Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – On insulating substrate or layer
Reexamination Certificate
2006-10-03
2006-10-03
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
On insulating substrate or layer
C438S478000
Reexamination Certificate
active
07115486
ABSTRACT:
A growth plane of substrate1is processed to have a concavo-convex surface. The bottom of the concave part may be masked. When a crystal is grown by vapor phase growth using this substrate, an ingredient gas does not sufficiently reach the inside of a concave part12,and therefore, a crystal growth occurs only from an upper part of a convex part11.As shown in FIG.1(b), therefore, a crystal unit20occurs when the crystal growth is started, and as the crystal growth proceeds, films grown in the lateral direction from the upper part of the convex part11as a starting point are connected to cover the concavo-convex surface of the substrate1,leaving a cavity13in the concave part, as shown in FIG.1(c), thereby giving a crystal layer2,whereby the semiconductor base of the present invention is obtained. In this case, the part grown in the lateral direction, or the upper part of the concave part12has a low dislocation region and the crystal layer prepared has high quality. The manufacturing method of the semiconductor crystal of the present invention divides this semiconductor base into the substrate1and the crystal layer2at the cavity part thereof to give a semiconductor crystal.
REFERENCES:
patent: 5279701 (1994-01-01), Shigeta et al.
patent: 5614019 (1997-03-01), Vichr et al.
patent: 5673092 (1997-09-01), Horie et al.
patent: 5676752 (1997-10-01), Bozler et al.
patent: 5727015 (1998-03-01), Takahashi et al.
patent: 6091085 (2000-07-01), Lester
patent: 6156581 (2000-12-01), Vaudo et al.
patent: 6225650 (2001-05-01), Tadatomo et al.
patent: 6252261 (2001-06-01), Usui et al.
patent: 6258617 (2001-07-01), Nitta et al.
patent: 6274518 (2001-08-01), Yuri et al.
patent: 6303405 (2001-10-01), Yoshida et al.
patent: 6335546 (2002-01-01), Tsuda et al.
patent: 6426519 (2002-07-01), Asai et al.
patent: 6582986 (2003-06-01), Kong et al.
patent: 6617182 (2003-09-01), Ishida et al.
patent: 2004/0048471 (2004-03-01), Okagawa et al.
patent: 0 874 405 (1998-10-01), None
patent: 04-236478 (1992-08-01), None
patent: 05-267175 (1993-10-01), None
patent: 09-219561 (1997-08-01), None
patent: 09-312418 (1997-12-01), None
patent: 09-326534 (1997-12-01), None
patent: 10-107317 (1998-04-01), None
patent: 10-178026 (1998-06-01), None
patent: 10-284507 (1998-10-01), None
patent: 2000-101139 (2000-04-01), None
patent: 2000-106455 (2000-04-01), None
patent: 2000-156524 (2000-06-01), None
patent: 2000-357663 (2000-12-01), None
Zheleva et al., “Pendeo-Epitaxy—A New Approach for Lateral Growth of GaN Structures,”Mrs Internet Journal of Nitride Semiconductor Research, Materials Research Society, Warrendale, Pennsylvania, 4S1, G3.38 (1999) (also presented at “1998 Fall Meeting of the Materials Research Society held in Boston, Massachusetts, Nov. 30-Dec. 4”).
Koto Masahiro
Okagawa Hiroaki
Ouchi Yoichiro
Tadatomo Kazuyuki
Coleman W. David
Jefferson Quovaunda
Leydig , Voit & Mayer, Ltd.
Mitsubishi Cable Industries Ltd.
LandOfFree
Semiconductor base and its manufacturing method, and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor base and its manufacturing method, and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor base and its manufacturing method, and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3623611