Semi-static flip-flops for RFID tags

Details Semi-static flip-flops for RFID tags Semi-static flip-flops for RFID tags

2006-07-20

2009-06-02

Chang, Daniel D (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Decoding

C340S572100, C235S492000

Reexamination Certificate

active

07541843

ABSTRACT:
A radio frequency identification (RFID) circuit including a semi-static flip-flop having a static storage time longer than its dynamic storage time. The RFID circuit may include a timing block circuit to provide a timing block clock signal to the semi-static flip-flop, the signal having a first clock state duration shorter than the dynamic storage time and a second clock state duration longer than the dynamic storage time.

REFERENCES:
patent: 4227097 (1980-10-01), Piguet
patent: 2003/0141913 (2003-07-01), Park et al.
patent: 2003/0183699 (2003-10-01), Masui
Yuan, Jiren and Svensson, Christer; New Single-Clock CMOS Latches and Flipflops with Improved Speed and Power Savings; IEEE Journal of Solid-State Circuits, Jan. 1997, pp. 62-69, vol. 32, No. 1.
Yuan, Jiren , et al., “New Single-Clock CMOS Latches and Flipflops with Improved Speed and Power Savings”,IEEE Journal of Solid-State Circuits, 32(1), (Jan. 1997),62-69.

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