Semi-conductor device

Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific current responsive fault sensor

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Details

357 80, 357 81, 361381, 361383, H01L 2302, H01L 2312, H01L 3902

Patent

active

050180045

ABSTRACT:
A semiconductor chip package technology which uses thin film wiring from the chip to the package terminals for increased line density and decreased parasitic capacitance and uses a thin film adhesion layer for improved heat conductivity between the package substrate and its sealing cap. The package uses a thin conductor film deposited along the element mounting surface of a sintered substrate. An adhesion layer, to provide a high quality bond between the sealing cap and substrate, is then deposited on the substrate peripheral area by successively laminating metal and metallized layers, or by depositing a single layer of low metal glass. The adhesion layer is thinner and of larger area than thick film technology, for improved heat conduction.

REFERENCES:
patent: 4561010 (1985-12-01), Ogihara et al.
patent: 4769690 (1988-09-01), Suzuki et al.
patent: 4868638 (1989-09-01), Hirata et al.

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