Self-timed memory device providing adequate charging time...

Details Self-timed memory device providing adequate charging time... Self-timed memory device providing adequate charging time...

2007-07-24

2007-07-24

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Precharge

C365S105000, C365S194000, C365S204000, C365S210130, C365S230060

Reexamination Certificate

active

11129269

ABSTRACT:
The invention includes an apparatus and method of selecting memory cells within a memory array. The method includes receiving a memory cell address. A column address and a row address are generated from the memory cell address. Row select lines or column select lines are pre-charged. A self-timed charging circuit is initiated to provide an adequate amount of time to charge a selected row, and to initiate elimination of static current flowing to unselected rows after a self-timed delay. The other of the row select lines or the column select lines are then pre-charged. Memory cells are selected based upon the column address and the row address. One of two states of the memory cells can be based upon sensing threshold voltages of sense lines that correspond with the selected memory cells.

REFERENCES:
patent: 4242605 (1980-12-01), Seelbach
patent: 4800529 (1989-01-01), Ueno
patent: 5596539 (1997-01-01), Passow et al.
patent: 6496440 (2002-12-01), Manning

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