Self-correcting I/O interface driver scheme for memory...

Details Self-correcting I/O interface driver scheme for memory... Self-correcting I/O interface driver scheme for memory...

2005-02-22

2005-02-22

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S093000, C326S090000, C710S100000, C710S120000

Reexamination Certificate

active

06859068

ABSTRACT:
A self-correcting I/O interface driver scheme uses a delay difference detector to detect a difference in delays between an I/O data path and an I/O clock path. The delay difference detector inputs signals from a data output pin connected to the I/O data path and a clock output pin connected to the I/O clock path. Upon determining a delay difference between the signals from the data and clock output pins, the delay difference detector generates signals to one or more drivers in the I/O data path and the I/O clock path. These signals from the delay difference detector are used to effectively adjust delays of the one or more drivers in order to effectively reduce the delay difference between the I/O data path and the I/O clock path.

REFERENCES:
patent: 6376869 (2002-04-01), Tomita
patent: 6597202 (2003-07-01), McCall et al.
patent: 6703866 (2004-03-01), Arimilli et al.
patent: 6801969 (2004-10-01), Crafts et al.

Affiliated with

Also associated with

Rating

Self-correcting I/O interface driver scheme for memory... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self-correcting I/O interface driver scheme for memory..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-correcting I/O interface driver scheme for memory... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3486125