Self-aligned silicidation structure and method of formation ther

Details Self-aligned silicidation structure and method of formation ther Self-aligned silicidation structure and method of formation ther

1997-09-11

1999-08-03

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438683, 438738, 438756, 438757, H01L 21336

Patent

active

059337397

ABSTRACT:
The invention relates to integrated circuits and to methods of forming self-aligned silicidation structures. In an exemplary embodiment, a first insulating layer is formed on the surface of a semiconductor substrate which includes an electrode. A second insulating layer is formed over the first insulating layer and a photoresist pattern is formed over a silicide exclusion area. Exposed portions of the first and second insulating layers are removed by one or more etching steps, wherein an etchant used to remove the exposed portions of the second insulating layer has a higher selectivity for the second insulating layer than for the first insulating layer. A silicide layer can then be formed over the surface of the semiconductor substrate except for silicide exclusion areas. Modification of the profiles of features underlying the first insulating layer, such as sidewall spacer and field oxides can thereby be prevented.

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patent: 5661084 (1997-08-01), Kuo et al.
patent: 5814553 (1998-09-01), Chuang et al.
Hummel, Rolf E., Electronic Properties of Materials, Srpinger-Velag, p. 143, 1993.

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