Self aligned non-volatile memory cell and process for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S258000, C257S314000, C257S315000

Reexamination Certificate

active

07105406

ABSTRACT:
Floating gate structures are disclosed that have a projection that extends away from the surface of a substrate. This projection may provide the floating gate with increased surface area for coupling the floating gate and the control gate. In one embodiment, the word line extends downwards on each side of the floating gate to shield adjacent floating gates in the same string. In another embodiment, a process for fabricating floating gates with projections is disclosed. The projection may be formed so that it is self-aligned to the rest of the floating gate.

REFERENCES:
patent: 5043940 (1991-08-01), Harari
patent: 5070032 (1991-12-01), Yuan et al.
patent: 5095344 (1992-03-01), Harari
patent: 5168465 (1992-12-01), Harari
patent: 5172338 (1992-12-01), Mehrotra
patent: 5198380 (1993-03-01), Harari
patent: 5268318 (1993-12-01), Harari
patent: 5268319 (1993-12-01), Harari
patent: 5297148 (1994-03-01), Harari et al.
patent: 5313421 (1994-05-01), Guterman
patent: 5315541 (1994-05-01), Harari et al.
patent: 5343063 (1994-08-01), Yuan
patent: 5380672 (1995-01-01), Yuan
patent: 5389808 (1995-02-01), Arai et al.
patent: 5459091 (1995-10-01), Hwang et al.
patent: 5512505 (1996-04-01), Yuan
patent: 5534456 (1996-07-01), Yuan
patent: 5554553 (1996-09-01), Harari
patent: 5579259 (1996-11-01), Samachisa
patent: 5595924 (1997-01-01), Yuan
patent: 5640032 (1997-06-01), Tomioka
patent: 5654217 (1997-08-01), Yuan
patent: 5661053 (1997-08-01), Yuan
patent: 5677872 (1997-10-01), Samachisa
patent: 5712179 (1998-01-01), Yuan
patent: 5712180 (1998-01-01), Guterman et al.
patent: 5747359 (1998-05-01), Yuan
patent: 5756385 (1998-05-01), Yuan
patent: 5786988 (1998-07-01), Harari
patent: 5847425 (1998-12-01), Yuan
patent: 5867429 (1999-02-01), Chen
patent: 5883409 (1999-03-01), Guterman
patent: 5923976 (1999-07-01), Kim
patent: 5965913 (1999-10-01), Yuan
patent: 5999448 (1999-12-01), Kurihara
patent: 6028336 (2000-02-01), Yuan
patent: 6046935 (2000-04-01), Takeuchi et al.
patent: 6060360 (2000-05-01), Lin et al.
patent: 6103573 (2000-08-01), Harari et al.
patent: 6151248 (2000-11-01), Harari et al.
patent: 6208545 (2001-03-01), Leedy
patent: 6222762 (2001-04-01), Guterman et al.
patent: 6235586 (2001-05-01), Au
patent: 6258665 (2001-07-01), Shimizu
patent: 6281075 (2001-08-01), Yuan
patent: 6281077 (2001-08-01), Patelmo et al.
patent: 6295227 (2001-09-01), Sakui et al.
patent: 6297097 (2001-10-01), Jeong
patent: 6417538 (2002-07-01), Choi
patent: 6455440 (2002-09-01), Jeng
patent: 6512263 (2003-01-01), Yuan
patent: 6529410 (2003-03-01), Han et al.
patent: 6559008 (2003-05-01), Rabkin et al.
patent: 6562682 (2003-05-01), Chiu et al.
patent: 2001/0001491 (2001-05-01), Sakui
patent: 2001/0015454 (2001-08-01), Seong-Soo et al.
patent: 2002/0093073 (2002-07-01), Mori et al.
patent: 2002/0160570 (2002-10-01), Tseng
patent: 2004/0033663 (2004-02-01), Chuang et al.
patent: 2004/0070021 (2004-04-01), Yuan
patent: 2004/0084713 (2004-05-01), Hsieh
International Search Report, PCT/US03/18183 filed Sep. 6, 2003.
U.S. patent application Ser. No. 09/925,102, Yuan, filed Aug. 8, 2001.
Patent Abstracts of Japan, Patent No. JP5190809, Published Jul. 1993, Kawasaki Steel Co., 1 page.
Patent Abstracts of Japan, Patent No. JP2001 135736, Published May 2001, NEC Corp., 1 page.
Taiwan Patent Office Preliminary Notice of Rejection of the IPO issued in corresponding Taiwan application, dated Jun. 21, 2005, 9 pages (translation attached).
International Search Report, PCT/US03/32119 filed Aug. 10, 2003.
U.S. Appl. No. 09/667,344 Yuan et al. Sep. 22, 2000.
Aritome, Seiichi, “Advanced Flash Memory Technology and Trends for File Storage Application,” IEDM Technical Digest, International Electronic Devices Meeting, IEEE, San Francisco, California, Dec. 10-13, 2000, pp. 33.1.1-33.1.4.
Takeuchi, Y., et al., “A Self-Aligned STI Process Integration for Low Cost and Highly Reliable IGbit Flash Memories,” 1998 Symposium on VLSI Technology; Digest of Technical Papers, IEEE, Honolulu, Hawaii, Jun. 9-11, 1998, pp. 102-103.
Lee, Jae-Duk, et al., “Effects of Parasitic Capacitance on NAND Flash Memory Cell Operation,” Non-Volatile Semiconductor Memory Workshop, IEEE, Monterey, California, Aug. 12-16, 2001, pp. 90-92.
Hori et al., “A MOSFET with Si-implanted Gate-SiO2Insulator for Nonvolatile Memory Applications,” IEDM 92, Apr. 1992, pp. 469-472.
Chan, et al., “A True Single-Transistor Oxide-Nitride-Oxide EEPROM Device,”IEEE Electron Device Letters, vol. EDL-8, No. 3, Mar. 1987, pp. 93-95.
Nozaki et al., “A 1-Mb EEPROm with MONOS Memory Cell for Semiconductor Disk Application,”IEEE Journal of Solid State Circuits, vol. 26, No. 4, Apr. 1991, pp. 497-501.
Eitan et al., “NROM: A Novel Localized Trapping, 2-Bit Nonvolatile Memory Cell,”IEEE Electron Device Letters, vol. 21, No. 11, Nov. 2000, pp. 543-545.
DiMaria et al., “Electrically-alterable read-only-memory using Si-rich SIO2injectors and a floating polycrystalline silicon storage layer,”J. Appl. Phys.52(7), Jul. 1981, pp. 4825-4842.
“Notification of Transmittal of the International Search Report, or the Declaration”, corresponding PCT application No. PCT/US2004/018545, International Searching Authority, European Patent Office, Nov. 22, 2004, 16 pages.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Self aligned non-volatile memory cell and process for... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self aligned non-volatile memory cell and process for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self aligned non-volatile memory cell and process for... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3602971

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.