Self-aligned MIM capacitor process for embedded DRAM

Details Self-aligned MIM capacitor process for embedded DRAM Self-aligned MIM capacitor process for embedded DRAM

2005-02-08

2005-02-08

Ngô, Ngân V. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S304000, C257S305000

Reexamination Certificate

active

06853024

ABSTRACT:
A semiconductor device includes a group of capacitors and a trench. Each capacitor includes a first conductive material layer, a dielectric layer, and a second conductive material layer. The dielectric layer is located between the first and second conductive material layers. The first conductive material layer coats an inside surface of a cup-shaped opening formed in an insulating layer. The trench is formed in the insulating layer. The trench extends between and crosses each of the capacitors in the group. The dielectric layer and the second conductive material layer are formed over the first conductive material layer in the cup-shaped openings and over an inside surface of the trench. The second conductive material layer extends between the capacitors of the group via the trench. Also, the second conductive material layer forms top electrodes for the capacitors of the group.

REFERENCES:
patent: 6211061 (2001-04-01), Chen et al.
patent: 6271084 (2001-08-01), Tu et al.
patent: 6381165 (2002-04-01), Lee et al.
patent: 6661051 (2003-12-01), Durcan et al.
patent: 20010010378 (2001-08-01), Matsubara et al.
patent: 20020011618 (2002-01-01), Ishibashi et al.
patent: 20030141531 (2003-07-01), Aihara

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