Self aligned method of forming non-volatile memory cells...

Details Self aligned method of forming non-volatile memory cells... Self aligned method of forming non-volatile memory cells...

2005-04-12

2005-04-12

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

Reexamination Certificate

active

06878591

ABSTRACT:
A method of forming an electrically erasable non-volatile memory cell array. Each memory cell includes a floating gate, a block of insulation material over the floating gate, and a control gate disposed laterally adjacent to and over the floating gate. The insulation material block is formed with a planarized upper surface (using a dummy poly layer as a planarization etch stop). The control gate is formed with a planarized upper surface (using the insulation material block upper surface as a planarization etch stop).

REFERENCES:
patent: 4757360 (1988-07-01), Farone
patent: 4794565 (1988-12-01), Wu et al.
patent: 4882707 (1989-11-01), Mizutani
patent: 4931847 (1990-06-01), Corda
patent: 4947221 (1990-08-01), Stewart et al.
patent: 5021848 (1991-06-01), Chiu
patent: 5029130 (1991-07-01), Yeh
patent: 5041886 (1991-08-01), Lee
patent: 5101250 (1992-03-01), Arima et al.
patent: 5268319 (1993-12-01), Harari
patent: 5429965 (1995-07-01), Shimoji
patent: 5493138 (1996-02-01), Koh
patent: 5544103 (1996-08-01), Lambertson
patent: 5572054 (1996-11-01), Wang et al.
patent: 5751048 (1998-05-01), Lee et al.
patent: 5780341 (1998-07-01), Ogura
patent: 5780892 (1998-07-01), Chen
patent: 5789293 (1998-08-01), Cho et al.
patent: 5796139 (1998-08-01), Fukase
patent: 5808328 (1998-09-01), Nishizawa
patent: 5811853 (1998-09-01), Wang
patent: 5814853 (1998-09-01), Chen
patent: 6091104 (2000-07-01), Chen
patent: 6103573 (2000-08-01), Harari et al.
patent: 6140182 (2000-10-01), Chen
patent: 6222227 (2001-04-01), Chen
patent: 6429075 (2002-08-01), Yeh et al.
patent: 6569736 (2003-05-01), Hsu et al.
patent: 6593187 (2003-07-01), Hsieh
patent: 6642103 (2003-11-01), Wils et al.
patent: 0 389 721 (1990-10-01), None
U.S. Appl. No. 09/401,622, filed Sep. 22, 1999, Johnson.

Affiliated with

Also associated with

Rating

Self aligned method of forming non-volatile memory cells... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self aligned method of forming non-volatile memory cells..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self aligned method of forming non-volatile memory cells... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3378963