Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-02-15
2011-02-15
Smith, Matthew S (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S677000, C257SE21409
Reexamination Certificate
active
07888220
ABSTRACT:
A semiconductor device comprising a substrate having a transistor that includes a metal gate structure; a first oxide layer formed over the substrate; a silane layer formed on the first oxide layer; and a non-conductive metal oxide layer grown on the metal gate structure, wherein the silane layer inhibits nucleation and growth of the non-conductive metal oxide layer.
REFERENCES:
patent: 6639288 (2003-10-01), Kunikiyo
patent: 2005/0127461 (2005-06-01), Dey et al.
patent: 2008/0116481 (2008-05-01), Sharma et al.
patent: 2008/0197426 (2008-08-01), Okazaki
Blackwell James
Rachmady Willy
Blakely , Sokoloff, Taylor & Zafman LLP
Enad Christine
Intel Corporation
Smith Matthew S
LandOfFree
Self-aligned insulating etchstop layer on a metal contact does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Self-aligned insulating etchstop layer on a metal contact, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-aligned insulating etchstop layer on a metal contact will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2632971