Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
1999-08-23
2003-05-20
Talbott, David L. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S758000
Reexamination Certificate
active
06566759
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to contacts for integrated circuit devices and more particularly to improved landing pads for contacts for self-aligned sidewall image conductors.
2. Description of the Related Art
Sidewall Image Transfer (SIT) techniques form conductors with very narrow widths or semiconductor devices with very short gate lengths without using critical photolithography. For example, a top view of a contact opening
10
for a sidewall conductor
11
is shown in FIG.
1
A and cross-sectional views at different points along the same structure are shown in
FIGS. 1B and 1C
. More specifically,
FIG. 1B
is a cross-section of
FIG. 1A
along line A-A′ and
FIG. 1C
is a cross-section of
FIG. 1A
along line B-B′.
In sidewall image transfer technology, conductive sidewalls
11
are formed adjacent an insulating mandrel
12
. More specifically, the insulator
12
(such as a glass or oxide) is formed using conventional lithographic techniques including depositing and patterning. The sidewall spacer conductors
11
are formed using conventional deposition and directional etching techniques (e.g., reactive ion etching-RIE), as is well known to those ordinarily skilled in the art. More specifically, a conductor (such as metal, alloy or polysilicon) is deposited to surround and cover the insulator
12
. Then, a directional etch is applied to the conductor. The directional etch removes material from horizontal surfaces at a much faster rate that it removes material from vertical surfaces, thereby leaving sidewall spacers
11
, as shown in FIG.
1
B. The directional etch could be, for example, a reactive ion etching process which is selective to the conductor and does not affect the insulator
12
or the underlying substrate.
The insulator
12
can be formed to have a minimum lithographic size which allows the conductive spacers
11
to be formed at sub-lithographic sizes.
FIG. 1A
also illustrates trim areas
13
which will eventually be removed to permit separation of the distinct conductors
11
.
Openings
10
into an insulator
14
are made using standard lithographic or other similar techniques. The openings
10
will eventually be filled with a conductive material to allow contact to an upper layer of wiring which will be formed at a later processing step.
However, the contact opening
10
must be small because the sidewall conductor
11
is very narrow (e.g., possibly sub-lithographic). This makes the alignment and overlay process very difficult, which in turn decreases yield and imposes limits on the pitch of structures so formed. Therefore, there is in a need for an improved structure and system for forming contacts to sidewall image transfer conductors.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a structure and method for forming a sidewall image transfer conductor having a contact pad that includes forming an insulator to include a recess, depositing a conductor around the insulator, and etching the conductor to form the sidewall image transfer conductor. The conductor remains in the recess and forms the contact pad. The recess is perpendicular to the sidewall image transfer conductor. The recess is formed to have a width smaller than twice a thickness of the sidewall image transfer conductor. The contact pad is formed to have a width greater than that of the sidewall image transfer conductor. The recess includes an indent and/or two outdents. The contact pad is formed to have an upper surface planar with that of the insulator and the sidewall image transfer conductor and a uniform unsloped upper surface.
Another embodiment of the invention is an integrated circuit chip that includes an insulator having a recess, a sidewall conductor positioned along the insulator, and a contact pad in the recess (the recess is perpendicular to said sidewall conductor). The recess has a width smaller than twice a thickness of the sidewall conductor. The contact pad has a width greater than that of the sidewall conductor. The recess includes an indent and/or two outdents. The contact pad has a uniform unsloped upper surface planar with that of the insulator and the sidewall conductor.
Yet another embodiment of the invention is an integrated circuit chip that includes an insulating mandrel having a linear edge and a non-linear feature along the linear edge, and a sidewall conductor positioned along the linear edge and the non-linear feature. The sidewall conductor within the non-linear feature includes a contact pad for the sidewall conductor. The non-linear feature has a width smaller than twice a thickness of the sidewall conductor. The contact pad has a width greater than that of the sidewall conductor. The non-linear feature is either a rectangular indent, two outdents, a curved indent or a wedge. The contact pad has a uniform unsloped upper surface planar with that of the insulator and the sidewall image transfer conductor.
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Conrad Edward W.
Lam Chung H.
Martin Dale W.
Sprogis Edmund
Cruz Lourdes
McGinn & Gibb PLLC
Sabb, Esq. William D.
Talbott David L.
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