Self-aligned conductive spacer process for sidewall control...

Details Self-aligned conductive spacer process for sidewall control... Self-aligned conductive spacer process for sidewall control...

2007-02-13

2007-02-13

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S258000, C438S259000, C438S201000, C438S211000, C438S216000, C438S261000, C438S593000, C438S596000, C438S740000, C438S742000, C257SE21626

Reexamination Certificate

active

11148342

ABSTRACT:
A self-aligned conductive spacer process for fabricating sidewall control gates on both sides of a floating gate for high-speed RAM applications, which can well define dimensions and profiles of the sidewall control gates. A conductive layer is formed on the dielectric layer to cover a floating gate patterned on a semiconductor substrate. Oxide spacer are formed on the conductive layer adjacent to the sidewalls of the floating gate. Performing an anisotropic etch process on the conductive layer and using the oxide spacers as a hard mask, a conductive spacers are self-aligned fabricated at both sides of the floating gate, serving as sidewall control gates.

REFERENCES:
patent: 6570213 (2003-05-01), Wu
patent: 6689658 (2004-02-01), Wu

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