Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-06-06
2006-06-06
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S241000, C438S396000, C438S637000, C257S298000, C257S308000, C257S311000
Reexamination Certificate
active
07056786
ABSTRACT:
A self-aligned buried contact (BC) pair includes a substrate having diffusion regions; an oxide layer exposing a pair of diffusion regions formed on the substrate; bit lines formed between adjacent diffusion regions and on the oxide layer, each of the bit lines having bit line sidewall spacers formed on sidewalls thereof; a first interlayer dielectric (ILD) layer formed over the bit lines and the oxide layer; a pair of BC pads formed between adjacent bit lines and within the first ILD layer, each BC pad being aligned with one of the pair of exposed diffusion regions in the substrate; and a pair of capacitors, each of the pair of BC pads having one of the pair of capacitors formed thereon, wherein a pair of the bit line sidewall spacers is adjacent to each of the BC pads and the pair of bit line sidewall spacers has an asymmetrical shape.
REFERENCES:
patent: 6168987 (2001-01-01), Jeng et al.
patent: 6177320 (2001-01-01), Cho et al.
patent: 6339239 (2002-01-01), Alsmeier et al.
patent: 6461911 (2002-10-01), Ahn et al.
patent: 6607954 (2003-08-01), Jeon et al.
patent: 2002/0135072 (2002-09-01), Han et al.
Cho Chang-Hyun
Chung Tae-Young
Yun Cheol-Ju
Lee & Morse P.C.
Samsung Electronics Co. LTD
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