Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
1999-09-29
2002-05-21
Mulpuri, Savitri (Department: 2812)
Semiconductor device manufacturing: process
With measuring or testing
C438S010000, C438S019000, C438S200000
Reexamination Certificate
active
06391664
ABSTRACT:
FIELD OF THE INVENTION
The present invention is exemplified in a number of implementations and applications, some of which are summarized below. In connection with the post-manufacturing analysis of integrated circuit devices, one aspect the present invention provides is a new and useful method involving the use of a solar cell for selectively activating circuitry in an integrated circuit device.
BACKGROUND OF THE INVENTION
The semiconductor industry has recently experienced technological advances that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes. Present semiconductor technology now permits single-chip microprocessors with many millions of transistors, operating at speeds of hundreds of millions of instructions per second to be packaged in relatively small, air-cooled semiconductor device packages. A by-product of such high-density and high functionality in semiconductor devices has been the demand for increased numbers of external electrical connections to be present on the exterior of the die and on the exterior of the semiconductor packages which receive the die, for connecting the packaged device to external systems, such as a printed circuit board.
As the manufacturing processes for semiconductor devices and integrated circuits increase in difficulty, methods for testing and debugging these devices become increasingly important. Not only is it important to ensure that individual chips are functional, it is also important to ensure that batches of chips perform consistently. In addition, the ability to detect a defective manufacturing process early is helpful for reducing the number of defective devices manufactured.
Traditionally, integrated circuits have been tested using methods including directly accessing circuitry or devices within the integrated circuit. In addition, many methods require the circuit to be powered. Directly accessing the circuitry is difficult for several reasons. For instance, in flip-chip type dies, transistors and other circuitry are located in a very thin epitaxially-grown silicon layer in a circuit side of the die. The circuit side of the die is arranged face-down on a package substrate. This orientation provides many operational advantages. However, due to the face-down orientation of the circuit side of the die, the transistors and other circuitry near the circuit side are not readily accessible for testing, modification, or other purposes. Therefore, access to the transistors and circuitry near the circuit side is from the back side of the chip.
Since access to the transistors and circuitry in flip-chips is generally from the back side of the device, it is often necessary to mill through the back side and probe certain circuit elements in order to test the device. Milling through the back side is often difficult and time consuming, and circuitry and devices in the integrated circuit may potentially be damaged by milling processes. In addition, for flip-chips and other integrated circuit devices, it is difficult to access and selectively activate circuitry within the device. The difficulty, cost, and destructive aspects of existing methods for analyzing integrated circuits are impediments to the growth and improvement of semiconductor technologies.
SUMMARY OF THE INVENTION
The present invention is exemplified in a number of implementations and applications, some of which are summarized below. In connection with the post-manufacturing analysis of integrated circuit devices, one aspect the present invention provides is a new and useful method involving the use of a solar cell for selectively activating circuitry in an integrated circuit device.
According to an example embodiment of the present invention, a solar cell is formed in an integrated circuit device. The solar cell is coupled to target circuitry to be powered. The solar cell is activated, power is supplied to the target circuitry, and the integrated circuit is analyzed in response to the powered target circuitry.
According to another example embodiment of the present invention, a system is arranged for analyzing an integrated circuit device having circuitry in a front side opposite a back side, and having a solar cell formed in the integrated circuit device. Light is directed to the solar cell and current is generated. The current is used to provide power to circuitry in the cell. In response to the powered circuitry, the integrated circuit is analyzed.
The above summary of the present invention is not necessarily intended to describe each illustrated embodiment or every implementation of the present invention. The figures and detailed description which follow more particularly exemplify these embodiments.
REFERENCES:
patent: 4296331 (1981-10-01), Rodriguez
patent: 4416054 (1983-11-01), Thomas
patent: 4759803 (1988-07-01), Cohen
patent: 5196374 (1993-03-01), Hundt et al.
patent: 5460659 (1995-10-01), Krut
patent: 5549762 (1996-08-01), Cantarini
Birdsley Jeffrey D.
Bruce Michael R.
Davis Brennan V.
Goruganthu Rama R.
Ring Rosalinda M.
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