Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2008-07-01
2008-07-01
Ellis, Kevin L. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S118000, C711S123000, C711S141000, C711S144000, C711S145000, C711S210000, C711S002000, C711S003000, C710S003000, C710S004000
Reexamination Certificate
active
07395380
ABSTRACT:
A method and structure for snooping cache memories of several snooping masters connected to a bus macro, wherein each non-originating snooping master has cache memory, and wherein some, but less than all the cache memories, may have the data requested by an originating snooping master and wherein the needed data in a non-originating snooping master is marked as updated, and wherein a main memory having addresses for all data is connected to the bus macro.Only those non-originating snooping masters which may have the requested data are queried. All the non-originating snooping masters that have been queried reply. If a non-originating snooping master has the requested data marked as updated, that non-originating snooping master returns the updated data to the originating snooping master and possibly to the main memory. If none of the non-originating snooping masters has the requested data marked as updated, then the requested data is read from main memory.
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Dieffenderfer James N.
Drerup Bernard C.
Ganasan Jaya P.
Hofmann Richard G.
Sartorius Thomas A.
Chery Mardochee
Cockburn Joscelyn G.
Driggs, Hogg & Fry Co. LPA
Ellis Kevin L.
International Business Machines - Corporation
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