Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-05-18
2001-10-09
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S785000
Reexamination Certificate
active
06300202
ABSTRACT:
RELATED APPLICATION
The present invention is related to the subject matter of co-pending patent application of Hegde et al., entitled, “Polysilicon Compatible Metal-Oxide Gate Dielectric Process”, attorney docket number SC 1195TP and filed of even date, which shares a common assignee with the present application and is incorporated by reference herein.
FIELD OF THE INVENTION
The present invention is related to the field of semiconductor fabrication and more particularly to a method for selectively removing a metal oxide film from a wafer.
RELATED ART
In a conventional metal oxide gate dielectric CMOS process, the gate dielectric must be selectively removed from source/drain regions of the wafer prior to source/drain implants to prevent metal in the dielectric film from being introduced into the substrate during the implant. Unfortunately, removal of the metal oxide dielectric using conventional dry etch processes lacks adequate selectivity with respect to silicon because of the large physical or sputtering component required to remove the metal oxide. This lack of selectivity may result in undesirable etching of the silicon substrate thereby rendering conventional dry etch techniques impractical for production. In addition, metal oxide dielectrics are not readily susceptible to wet etch processing. While concentrated HP solutions are capable of etching metal oxides, the etch rate is undesirably slow and the etch uniformity is poor. Moreover, if portions of an underlying isolation structure are exposed during the wet etch of a metal oxide dielectric film using a hydrofluoric acid (HF) solution, such as concentrated HF, the solution may rapidly etch the exposed portions of the isolation structure. Furthermore, the concentrated HF solution can also undercut spacer structures on the sidewalls of a gate electrode thereby possibly exposing the metal gate itself. Exposing the metal gate is undesirable because the concentrated HF or subsequent processes can attack it. Therefore, it would be highly desirable to implement a fabrication process using a metal oxide dielectric that enabled selective removal of the metal oxide dielectric without significantly affecting other structures on the wafer and without significantly increasing the cost or complexity of the process.
REFERENCES:
patent: 6020024 (2000-02-01), Maiti et al.
patent: 6115281 (2000-09-01), Aggarwal et al.
patent: 6130103 (2000-10-01), Cuchiaro et al.
patent: 6165802 (2000-12-01), Cuchiaro et al.
patent: 6171934 (2001-01-01), Joshi et al.
patent: 6204203 (2001-03-01), Narwankar et al.
patent: 6222240 (2001-04-01), Gardner et al.
Hegde Rama I.
Hobbs Christopher C.
Tobin Phillip J.
Lindsay Jr. Walter L.
Motorola Inc.
Niebling John F.
Rodriguez Robert A.
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