Selective P-channel V T adjustment in SiGe system for...

Details Selective P-channel V T adjustment in SiGe system for... Selective P-channel V T adjustment in SiGe system for...

2007-08-07

2007-08-07

Whitehead, Jr., Carl (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S616000, C257SE27064, C257SE29297

Reexamination Certificate

active

10889026

ABSTRACT:
A method of manufacturing a semiconductor device includes forming a silicon germanium layer and a N-channel transistor and a P-channel transistor over the silicon germanium layer. A beta ratio of the N-channel transistor to the P-channel transistor is about 1.8 to about 2.2. A semiconductor device is also disclosed.

REFERENCES:
patent: 6734527 (2004-05-01), Xiang
patent: 6764908 (2004-07-01), Kadosh et al.
patent: 6906393 (2005-06-01), Sayama et al.
patent: 6914301 (2005-07-01), Bae et al.
patent: 6916727 (2005-07-01), Leitz et al.
patent: 6949436 (2005-09-01), Buller et al.
patent: 6974735 (2005-12-01), Fitzgerald
patent: 2005/0023520 (2005-02-01), Lee et al.

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