Seedless wirebond pad plating

Details Seedless wirebond pad plating Seedless wirebond pad plating

2006-10-03

2006-10-03

Lee, Eddie C. (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S767000, C257S768000, C257S779000, C257S620000, C257S621000, C257S730000, C257S786000

Reexamination Certificate

active

07115997

ABSTRACT:
An integrated circuit (IC) chip, semiconductor wafer with IC chips in a number of die locations and a method of making the IC chips on the wafer. The IC chips have plated chip interconnect pads. Each plated pad includes a noble metal plated layer electroplated to a platable metal layer. The platable metal layer may be copper and the noble metal plated layer may be of gold, platinum, palladium, rhodium, ruthenium, osmium, iridium or indium.

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