Security apparatus and method for nonvolatile memory and...

Details Security apparatus and method for nonvolatile memory and... Security apparatus and method for nonvolatile memory and...

2007-07-26

2010-11-09

Peugh, Brian R (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

Reexamination Certificate

active

07831763

ABSTRACT:
A security apparatus for a nonvolatile memory includes a nonvolatile memory, a working buffer temporality storing a predetermined unit output from the nonvolatile memory, a checksum buffer storing a checksum of at least one unit output from the nonvolatile memory, and a read verification engine controlling storing of a unit output from the nonvolatile memory corresponding to a read signal that is externally input, in the working buffer. The read verification engine calculates a checksum of the unit corresponding to the read signal stored in the working buffer and compares a calculated checksum with a checksum of the unit corresponding to the read signal stored in the checksum buffer.

REFERENCES:
patent: 7103684 (2006-09-01), Chen et al.
patent: 7392404 (2008-06-01), Montgomery et al.
patent: 2004/0123132 (2004-06-01), Montgomery et al.
patent: 08-110937 (1996-04-01), None
patent: 2002-269523 (2002-09-01), None
patent: 2003-263618 (2003-09-01), None
patent: 1996-0702651 (1996-04-01), None
patent: 1020040087794 (2004-10-01), None

Affiliated with

Also associated with

Rating

Security apparatus and method for nonvolatile memory and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Security apparatus and method for nonvolatile memory and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Security apparatus and method for nonvolatile memory and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4201265