Scan test system for semiconductor device

Details Scan test system for semiconductor device Scan test system for semiconductor device

2005-03-08

2005-03-08

DeCady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S727000, C714S724000, C714S733000, C702S120000, C326S016000, C377S019000

Reexamination Certificate

active

06865703

ABSTRACT:
There is provided a scan test system comprising: a semiconductor device including a scan register connected between an input/output pin on an analog input side and an internal system logic; a semiconductor device including a scan register connected between an input/output pin on an analog output side and an analog sensor; and an analog wiring connecting the input/output pins each other. Thus, the scan register can be chained to thereby constitute a boundary scan register chain, and thereby JTAG control can be carried out by use of TAPC. Therefore, monitoring inspection where probes are set up by high-density-assembling of semiconductor devices and the multiple pins of low-cost devices, can be achieved.

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patent: 5404358 (1995-04-01), Russell
patent: 5428624 (1995-06-01), Blair et al.
patent: 5491666 (1996-02-01), Sturges
patent: 6708304 (2004-03-01), Tsukimori et al.
patent: 5-322989 (1993-12-01), None
patent: 07-104039 (1995-04-01), None
patent: 11-038091 (1999-02-01), None

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