Scan flip flop, semiconductor device, and production method...

Details Scan flip flop, semiconductor device, and production method... Scan flip flop, semiconductor device, and production method...

2007-01-02

2007-01-02

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

With test facilitating feature

C326S095000, C326S098000

Reexamination Certificate

active

11013886

ABSTRACT:
There is provided a flip flop circuit with a scan structure which is formed by an input section of a dynamic circuit and an output section of a static circuit wherein data is taken in within an interval of a short pulse width as compared with a clock cycle. In the dynamic circuit of the input section, the number of serially-connected MOS transistors to which a data signal is input is smaller than the number of serially-connected MOS transistors to which a test input signal is input. With this structure, the speed of operation is increased at the time of data storage for a data signal input, and the number of MOS transistors is reduced.

REFERENCES:
patent: 5041742 (1991-08-01), Carbonaro
patent: 5898330 (1999-04-01), Klass
patent: 6744282 (2004-06-01), Dhong et al.
Fabian Klass; “Semi-Dynamic and Dynamic Flip-Flops with Embedded Logic”;1998 Symposium on VLSI Circuits Digest of Technical Papers; c. 1998; pp. 108 & 109; Sun Microsystems Inc.

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