Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-11-21
2006-11-21
Tu, Christine T. (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
07139951
ABSTRACT:
A scan enabled storage device includes two storage elements and two input circuits. A data input circuit accepts a data signal, a clock signal, and a scan enable signal to inhibit the operation of the clock signal. A scan data input circuit accepts a scan data signal and a scan clock signal.
REFERENCES:
patent: 4580066 (1986-04-01), Berndt
patent: 6032278 (2000-02-01), Parvathala et al.
patent: 6182256 (2001-01-01), Qureshi
patent: 6810498 (2004-10-01), Shimizu
LeMoine Patent Services, PLLC
Tu Christine T.
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