Scan circuitry controlled switch connecting buffer output to...

Details Scan circuitry controlled switch connecting buffer output to... Scan circuitry controlled switch connecting buffer output to...

2011-04-12

2011-04-12

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S726000

Reexamination Certificate

active

07925951

ABSTRACT:
The peripheral circuitry (350, 360, ESD, BH) of an integrated circuit die on a wafer is tested without physically contacting the bond pads of the die.

REFERENCES:
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patent: 5491347 (1996-02-01), Allen et al.
patent: 6708144 (2004-03-01), Merryman et al.
Whetsel, L.; , “Improved boundary scan design,” Test Conference, 1995. Proceedings., International , vol., No., pp. 851-860, Oct. 21-25, 1995 doi: 10.1109/TEST.1995.529917.
Halliday, A.; Young, G.; Crouch, A.; , “Prototype testing simplified by scannable buffers and latches,” Test Conference, 1989. Proceedings. Meeting the Tests of Time., International , vol., No., pp. 174-181, Aug. 29-31, 1989 doi: 10,1109/TEST.1989.82292.

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