Scan chain partition for reducing power in shift mode

Details Scan chain partition for reducing power in shift mode Scan chain partition for reducing power in shift mode

2008-07-29

2008-07-29

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S734000

Reexamination Certificate

active

11012011

ABSTRACT:
A scan chain partition includes a serial input coupled to a scan input signal pin of a module under test. A plurality of scan sub-chains is coupled to the serial input. A scan sub-chain output multiplexer is coupled to the plurality of scan sub-chains for sequentially selecting only one of the scan sub-chains in response to a scan sub-chain control signal. A scan sub-chain controller generates the scan sub-chain control signal and gates a scan clock signal to only a scan clock input of the selected scan sub-chain.

REFERENCES:
patent: 5592493 (1997-01-01), Crouch et al.
patent: 6378093 (2002-04-01), Whetsel
patent: 6519729 (2003-02-01), Whetsel
patent: 2002/0170010 (2002-11-01), Saxena et al.
patent: 2005/0268190 (2005-12-01), Kapur et al.
patent: 2006/0107144 (2006-05-01), Saxena et al.

Affiliated with

Also associated with

Rating

Scan chain partition for reducing power in shift mode does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Scan chain partition for reducing power in shift mode, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Scan chain partition for reducing power in shift mode will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3954584