Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-12-11
2007-12-11
Whitehead, Jr., Carl (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
Reexamination Certificate
active
11014836
ABSTRACT:
The scalable planar DMOS transistor structure of the present invention comprises a scalable source region surrounded by a planar gate region. The scalable source region comprises a p-base diffusion region being formed in a n−epitaxial semiconductor layer through a ring-shaped implantation window, a n+source diffusion ring being formed in a surface portion of the p-base diffusion region through the ring-shaped implantation window, a p+contact diffusion region being formed in a middle semiconductor surface portion through a self-aligned implantation window being surrounded by the ring-shaped implantation window, and a self-aligned source contact window being formed on the p+contact diffusion region and the n+source diffusion ring surrounded by a sidewall dielectric spacer. The planar gate region comprises a patterned heavily-doped polycrystalline-silicon gate layer being formed on a gate dielectric layer and capped locally with or without metal silicide layers.
Harrison Monica D.
Jr. Carl Whitehead
Pai Patent & Trademark Law Firm
Silicon-Based Technology Corp.
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