Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2011-07-19
2011-07-19
Tabone, Jr., John J (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S030000, C714S724000, C714S742000, C714SE11155, C714SE11169, C714SE11210, C716S112000, C716S136000, C712S227000, C712S228000
Reexamination Certificate
active
07984352
ABSTRACT:
A system comprises built-in self-test (BIST) logic configured to perform a BIST, processing logic coupled to the BIST logic and storage logic coupled to the processing logic. The storage logic comprises debug context information associated with a debugging session. Prior to performance of the BIST, the processing logic stores the debug context information to a destination. After performance of the BIST, the processing logic is reset, and the processing logic restores the debug context information from the destination to the storage logic.
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Brady W. James
Pessetto John R.
Tabone, Jr. John J
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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