Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2006-07-11
2006-07-11
Browne, Lynne H. (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S500000, C713S502000, C713S401000, C713S600000, C365S189011, C365S205000
Reexamination Certificate
active
07076677
ABSTRACT:
A source synchronous bus system is provided with a bus; a first device connected to the bus, having a driver to drive data and strobe signals, via the bus; and a second device connected to the bus, having a receiver to receive data and the strobe signals from the bus, and to select one of rising and falling edges of the strobe signals to latch a corresponding one of rising and falling edges of the data received from the bus, for subsequent data processing functions in order to compensate for systematic differences between rising and falling edges of the data received, via the bus.
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Ball Zane A.
Falconer Maynard C.
Browne Lynne H.
Intel Corporation
Schwegman Lundberg Woessner & Kluth P.A.
Trujillo James K.
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