Static information storage and retrieval – Read/write circuit – Testing
Patent
1999-07-09
2000-08-15
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Testing
36518911, 365203, G11C 1300
Patent
active
061046507
ABSTRACT:
Testing methods and facilitating circuitry to permit activation and latching of multiple word lines in a dynamic memory device in conjunction with external control over digit line equilibrate and activation of sense amplifiers. Such testing methods are adaptable for use prior to row repair or post row repair. Such testing methods permit controlled stressing of cell margin and beta ratio by selective coupling of one or more sacrificial rows to a digit line prior to sensing of data in a target row. Useful design and reliability information may be obtained through application of various embodiments of such testing methods.
REFERENCES:
patent: 5487037 (1996-01-01), Lee
patent: 5544108 (1996-08-01), Thomann
patent: 5651011 (1997-07-01), Keeth
patent: 5684809 (1997-11-01), Stave et al.
Fears Terrell W.
Micro)n Technology, Inc.
LandOfFree
Sacrifice read test mode does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Sacrifice read test mode, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Sacrifice read test mode will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2014520