4. Static information storage and retrieval
  5. Read/write circuit
  6. Testing

Michael Shore

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Circuit and method for masking a dormant memory cell

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

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Circuit and method for masking a dormant memory cell

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Circuit and method for masking a dormant memory cell

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Combination column redundancy system for a memory array

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Detection of row-to-row shorts and other row decode defects...

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate

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Profile ID: LFUS-PAI-P-1796657

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