Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2008-06-17
2008-06-17
Kerveros, James C (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
07389460
ABSTRACT:
Methods, systems, apparatus and devices to provide autonomous self-repair for programmable logic. Using Competitive Runtime Reconfiguration, an initial population of functionally identical, yet physically distinct individual programmable logic configurations are produced at design time. During operation, individuals compete for selection based on a fitness function favoring fault-free behavior and any physical resource exhibiting an operationally-significant fault decreases the fitness of those configurations which use it. Through runtime competition, the presence of the fault becomes occluded from the visibility of subsequent operations. Offspring formed through crossover and mutation of faulty and viable configurations are reintroduced into the population to enable evolution of a customized fault-specific repair, realized as new configurations using normal throughput processing operations. In an embodiment, the error detection circuit is also checked for errors.
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Kerveros James C
Law Offices of Brian S. Steinberger , P.A.
Steinberger Brian S.
University of Central Florida Research Foundation Inc.
Wood Phyllis K.
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