RRAM controller built in self test memory

Details RRAM controller built in self test memory RRAM controller built in self test memory

2008-04-08

2008-04-08

Trimmings, John P (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S025000, C714S042000, C714S718000, C714S733000, C365S201000, C711S101000

Reexamination Certificate

active

11256829

ABSTRACT:
An RRAM design having linear BIST memory and rectangular BIST memory, the improvement comprising at least one of the linear BIST memory and the rectangular BIST memory formed only of flipflops and logic cells.

REFERENCES:
patent: 5506959 (1996-04-01), Cockburn
patent: 5737767 (1998-04-01), Agrawal et al.
patent: 2006/0200713 (2006-09-01), Slobodnik et al.
Lizy Kurian John, “VaWiRAM: A Variable Width Random Access Memory Module”, Jan. 1996, IEEE 9th Conference on VLSI Design, pp. 219-224.

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