Reverse dummy insertion algorithm

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C430S005000

Reexamination Certificate

active

07853918

ABSTRACT:
A method of inserting dummy patterns includes providing a window area comprising a main pattern. The main pattern includes first patterns of a first type of features, and second patterns of a second type of features. The first and the second types are different types. The method further includes globally inserting first dummy patterns throughout the window area, wherein the first dummy patterns are dummy patterns of the first type of features; enlarging the main pattern to generate an enlarged main pattern, wherein the enlarged main pattern occupies an enlarged region of the window area; removing the portion of the first dummy patterns in the enlarged region from the first dummy patterns to generate first inversed dummy patterns; and combining the first patterns in the main pattern with the first inversed dummy patterns to generate first mask patterns for the first type of features.

REFERENCES:
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patent: 5798298 (1998-08-01), Yang et al.
patent: 5926733 (1999-07-01), Heo
patent: 6603162 (2003-08-01), Uchiyama et al.
patent: 7235424 (2007-06-01), Chen et al.
patent: 7458053 (2008-11-01), Ruderer et al.

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