Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-08-21
1999-08-24
Pan, Daniel H.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395571, 395826, 711217, G06F 934, G06F 1212
Patent
active
059434937
ABSTRACT:
A method of executing a program includes reading a next operation of an executing program and determining if a given pointer corresponding to the next operation is stored in a pointer table. If the given pointer is stored in the pointer table, an instruction identified by the given pointer is executed in a processor. However, if the given pointer is not stored in the pointer table, a replaceable pointer in the pointer table is identified and replaced by the given pointer. Instructions corresponding to the given pointer are also imported into a processor instruction unit from a supplemental storage area and subsequently executed by the processor. The instructions can comprise microcode or a portion of a programmable gate array. In the latter case, the supplemental storage area can store gate array programming instructions for use in reprogramming the instructions in the processor. When replacing a pointer in the pointer table, a least recently used algorithm or a most recently used algorithm are provided as examples of methods for defining the replaceable pointer. A retargetable VLIW computer architecture for carrying out this method includes a program execution unit, a pointer table, a processor, a processor instruction unit, and a supplemental storage area. The architecture further includes interconnections between the aforementioned elements for updating the pointer table to replace a replaceable pointer with a given pointer and for replacing one or more instructions corresponding to the replaceable pointer with one or more instructions corresponding to the given pointer.
REFERENCES:
patent: 5327551 (1994-07-01), Kameko
patent: 5392406 (1995-02-01), Peterson et al.
patent: 5509131 (1996-04-01), Smith et al.
patent: 5696925 (1997-12-01), Koh
Asghar Saf
Lee Sherman
Teich Paul R.
Advanced Micro Devices , Inc.
Pan Daniel H.
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