Resistance variable memory device reducing word line voltage

Static information storage and retrieval – Systems using particular element – Resistive

Reexamination Certificate

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C365S185230, C365S185050

Reexamination Certificate

active

07830699

ABSTRACT:
A resistance variable memory device includes a memory cell array, a sense amplifier circuit, and a column selection circuit. The memory cell array includes a plurality of block units and a plurality of word line drivers, where each of the block units is connected between adjacent word line drivers and includes a plurality of memory blocks. The sense amplifier circuit includes a plurality of sense amplifier units, where each of the sense amplifier units provides a read current to a corresponding block unit and includes a plurality of sense amplifiers. The column selection circuit is connected between the memory cell array and the sense amplifier circuit and selects at least one of the plurality of memory blocks in response to a column selection signal to apply the read current from the sense amplifier circuit to the selected memory block.

REFERENCES:
patent: 6337824 (2002-01-01), Kono et al.
patent: 2007/0258303 (2007-11-01), Kajitani et al.
patent: 2009/0122611 (2009-05-01), Shimizu et al.
patent: 2009/0207642 (2009-08-01), Shimano et al.
patent: 2000-0062116 (2000-10-01), None
patent: 1020050020356 (2005-03-01), None
patent: 1020050105546 (2005-11-01), None
patent: 1020070056667 (2007-06-01), None

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