Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With heat sink means
Reexamination Certificate
2003-05-13
2004-06-22
Clark, Jasmine (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With heat sink means
C257S666000, C257S689000, C257S706000, C257S708000
Reexamination Certificate
active
06753596
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a semiconductor device and, in particular but not exclusively, to a resin-sealed power semiconductor device.
2. Description of the Related Art
Japanese Laid-Open Patent Publication (unexamined) No. 5-235228 discloses a resin-sealed semiconductor device that has a semiconductor element firmly fixed, by soldering, to a frame having a plurality of grooves defined therein. During soldering, a soldering material then wetting a frame spreads over the frame and is then blocked by an internal groove, while during a subsequent resin-sealing process an external groove prevents foreign substances from entering the semiconductor element thorough an interface between a molding resin and the frame.
A semiconductor device as disclosed in Japanese Laid-Open Patent Publication (unexamined) No. 9-92778 includes a frame having a die pad region on which a semiconductor element is placed. A plurality of recesses are formed in the die pad region to enhance the degree of adhesion between the frame and a sealing resin and prevent an outflow of a bonding agent that is used for die bonding.
Japanese Laid-Open Patent Publication (unexamined) No. 7-273270 discloses a frame structure having a plurality of recesses each in the form of an octopus pot for the purpose of enhancing the degree of adhesion between the frame and a sealing resin. The octopus pot-shaped recesses can be formed at a low cost by repeating press working twice.
In the semiconductor device as disclosed in Japanese Laid-Open Patent Publication No. 5-235228, however, the amount of the soldering material flowing into the grooves cannot be controlled constant and, hence, the thickness of the soldering material cannot be stabilized.
In the semiconductor device as disclosed in Japanese Laid-Open Patent Publication No. 9-92778, no attention has been paid to the state of the molten solder having a reduced viscosity. During soldering, the molten solder passes portions other than the recesses and, hence, there arises a problem in that the flow of the molten solder cannot be satisfactorily controlled, making it impossible to strictly control the amount of the soldering material immediately below the semiconductor element.
The semiconductor device as disclosed in Japanese Laid-Open Patent Publication No. 7-273270 involves a problem in that there is a limit in reducing the pitch between the spots to be processed if a die assembly has a complicated shape and is made using a relatively inexpensive processing method such as, for example, cutting work. If a further reduction in pitch of the octopus pot-shaped recesses is pursued, a relatively expensive manufacturing method such as, for example, electric discharge machining is required, resulting in an expensive die assembly.
SUMMARY OF THE INVENTION
The present invention has been developed to overcome the above-described disadvantages.
It is accordingly an objective of the present invention to provide a highly reliable resin-sealed semiconductor device capable of enhancing the stability in thickness of a soldering material immediately below a semiconductor element that is secured to a metallic plate and ensuring the degree of adhesion between the metallic plate and a molding resin by executing a predetermined processing with respect to the metallic plate using a relatively inexpensive die assembly.
In accomplishing the above and other objectives, the resin-sealed semiconductor device according to the present invention includes a metallic plate and a semiconductor element soldered thereto, wherein the metallic plate has a semiconductor element mounting region (die pad region) formed on one surface thereof and a plurality of squared recesses defined in the one surface at approximately regular intervals at locations other than the semiconductor element mounting region.
This construction can enhance the stability in thickness of the soldering material and ensure the degree of adhesion between the metallic plate and the molding resin, making it possible to provide a highly reliable resin-sealed semiconductor device.
Because the plurality of squared recesses can be formed in the surface of the metallic plate by press working or coining, a relatively inexpensive die assembly can be used, thus enabling the manufacture of the resin-sealed semiconductor device at a low cost.
It is preferred that each of the plurality of recesses is made up of two squared recesses offset in a diagonal direction thereof. The two squared recesses may have a stepped bottom wall.
REFERENCES:
patent: 6262477 (2001-07-01), Mahulikar et al.
patent: 6307755 (2001-10-01), Williams et al.
patent: 6329711 (2001-12-01), Kawahara et al.
patent: 6376910 (2002-04-01), Munoz et al.
patent: 6392294 (2002-05-01), Yamaguchi
patent: 6437427 (2002-08-01), Choi
patent: 6483178 (2002-11-01), Chuang
patent: 6498392 (2002-12-01), Azuma
patent: 6610924 (2003-08-01), Lee et al.
patent: 2002/0096756 (2002-07-01), Kobauakawa
patent: 5-235228 (1993-09-01), None
patent: 7-273270 (1995-10-01), None
patent: 9-92778 (1997-04-01), None
Ishida Kiyoshi
Nakajima Dai
Shikano Taketoshi
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